Architected cp15 timer(s) running at 24.00MHz (phys). rk_get_uboot_display_flag: uboot_logo_on = 1 rkclk: rkclk_cache_parents: ehci1phy_12m_div clk_get error rkclk: _rkclk_add_provider: fail to get ehci1phy_12m_div RCU dyntick-idle grace-period acceleration is enabled. Preemptible hierarchical RCU implementation. SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 please try 'cgroup_disable=memory' option if you don't want memory cgroups Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) PID hash table entries: 2048 (order: 1, 8192 bytes) Kernel command line: vmalloc=496M console=ttyFIQ0 linux=permissive androidboot.hardware=rk30board nsole=ttyFIQ0 init=/init storagemedia=emmc loader.timestamp=_17:34:30 lcdtype=7000
Built 1 zonelists in Zone order, mobility grouping on. HighMem zone: 393216 pages, LIFO batch:31 HighMem zone: 3072 pages used for memmap Normal zone: 131072 pages, LIFO batch:31 free_area_init_node: node 0, pgdat c0d58d80, node_mem_map c0e85000 Memory policy: ECC disabled, Data cache writealloc ion_reserve: cma reserved base 7bc00000 size 33554432 ion heap(vmalloc): base(0) size(0) align(0) rockchip_uboot_mem_reserve: reserve for uboot logo
rockchip_uboot_logo_setup: mem: offset:0x00000000 Machine: Rockchip RK3288 (Flattened Device Tree), model: rockchip,rk3288 CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache CPU: ARMv7 Processor revision 1 (ARMv7), cr=10c5387d cpu_do_switch_mm is cpu_v7_btbinv_switch_mm Type `help' to learn how to use Xshell prompt.
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